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NI SPI Example for the NI PXIe-5644R by NI - Toolkit for LabVIEW Download

This example implements serial peripheral interface (SPI) communication through the DIO port on the NI PXIe-5644R, including support for both master and slave functionality.

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Version1.0.0.3
ReleasedMay 19, 2016
Publisher NI
LicenseNI Sample Code License
LabVIEW VersionLabVIEW=12.0
Operating System Windows
Project links Homepage  

Description

Serial Peripheral Interface (SPI) buses are commonly used to communicate between a controller (master) device and a target (slave) device. In general, SPI buses require four lines for communication: chip select/clock enable, serial clock, master serial data out (MOSI), and master serial data in (MISO). In some cases only a subset of these lines are used; some devices multiplex both MOSI and MISO onto a single bidirectional data line. This example includes LabVIEW FPGA code for both an SPI master and an SPI slave.

Release Notes

1.0.0.3 (May 19, 2016) no release notes for this version

Install with VIPM Download Package

Note, you must have the VIPM Desktop app to install this package into LabVIEW.

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