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Single Port SPI Example for LabVIEW FPGA by NI - Toolkit for LabVIEW Download

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Version1.0.0.1
ReleasedMay 19, 2016
Publisher NI
LicenseNot Specified
LabVIEW VersionLabVIEW>=9.0
Operating System Windows, Mac, and Linux
Project links Homepage  

Description

SPI is a commonly used communication protocol for both integrated circuit communication and embedded sensors. The protocol operates in full duplex with a single master and multiple slaves per port. This allows the flexibility of communicating with several different devices through a single port where each device can have its own clock rate and command set.

The SPI bus in this document is implemented using LabVIEW FPGA to perform the bus mastering and clocking signals. A single-cycle timed loop (SCTL) is used to perform each step of communication between the SPI master (LabVIEW FPGA VI) and up to 8 slave devices per port. Multiple ports can be created using the same FPGA VI and interface to a host program.

The bus is encapsulated in a higher level LabVIEW FPGA VI, which utilizes a state machine to perform intermediate communication between each SPI port and a host interface. This VI synchronizes the host interface and SPI ports and multiplexes data sent from the host to a specified port.

Release Notes

1.0.0.1 (May 19, 2016) no release notes for this version

Install with VIPM Download Package

Note, you must have the VIPM Desktop app to install this package into LabVIEW.

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